Quick Navigation
Context: Why We Built This
In our previous posts, we analyzed why traditional autorouting is broken and autoplacement requires manual intervention. Today, we're sharing our honest assessment of what we've built to address these challenges.
The reality is that existing autorouting and autoplacement tools have fundamental limitations that prevent them from delivering production-ready results. Rather than just critiquing existing solutions, we decided to build our own automation technology specifically designed for embedded hardware applications. But the question remains: Is it actually any good?
We have divided this article into sections covering our automation flow, inputs required, placement results, and routing results.
Our Automation Flow
Here's how our Altium automation process works from start to finish:
Schematic Import
Import your Altium schematic files. Our tool reads the design hierarchy, component data, and connectivity information.
Constraint Extraction
Design rules are read from your schematic and external configuration. Track widths, clearances, and layer stackup are parsed automatically.
Placement Generation
Components are placed based on circuit topology and design constraints. The algorithm considers functional grouping and routing feasibility.
Routing Execution
Automated routing connects all nets while respecting design rules. Power distribution and signal routing are handled in coordinated passes.
Export to Altium
The completed design is exported back to Altium format for review, refinement, and manufacturing output generation.
What Are the Inputs?
Our automation system requires specific inputs from the Altium design environment:
📋 Required Input Files
- Altium schematic files (.SchDoc) - Contains circuit connectivity and hierarchy
- Board file with board outline defined
- Component footprints placed outside the board outline
⚙️ Design Rules Configuration
- Track widths and clearances
- Via sizes and drill specifications
- Layer stackup configuration
- These are added through an external configuration document
🎯 Optional Inputs
- Predefined component positions - specify rough locations for connectors or critical components
- Keep-out zones and mechanical constraints
How Do We Control the Process?
Our app runs through discrete stages, giving you control at each step without wasting time on full design cycles. You can iterate on placement, routing, and output generation independently.
Reviews at Each Stage
🔍 1. Netlist Verification
Verification of netlist integrity and connectivity before processing begins.
📚 2. Library Mismatch Detection
Detection of component footprint and library inconsistencies.
📊 3. Placement Scoring
Placement quality metrics generated based on design rules.
🏭 4. DFA/DFM Checks
Design for Assembly and Design for Manufacturing validation.
✅ 5. Routing Completion Metrics
Evaluation of routing quality, completion percentage, and rule violations.
Component Placement: What We've Achieved
Features
🎯 Target Applications
Our algorithms are best fit for IoT, industrial, and general embedded hardware.
📊 Capacity and Board Fill
- We can achieve good placement up to 75% board fill. By board fill we mean the density of component outlines to board outline
- Currently able to handle 1000+ component boards without breaking constraints
🧠 Intelligent Circuit Recognition
Our system understands circuit designs. We use your data and constraints to generate the PCB placement design.
🔧 Tool Compatibility
Algorithm works for Altium, Cadence and KiCad platforms.
Limitations
Scalability and Testing
For larger designs, our tests are still ongoing.
Complex Board Limitations
Higher packing ratios where we cannot do super complex boards yet.
Placement Results
Our Routing Results
These are the images of our routing output. The engineer did not have to setup the project. It took 30 minutes to complete the routing. The engineer had to spend 6 hours to further correct the routing and improve the traces for the above board.
Results: The Good and The Bad
✅ What Works Well
Speed and Completion Rate
We use our own autorouting algorithms to complete routing for the board within 30 minutes. We achieve 80% routing completion compared to mixed up non-controlled routing flow.
Automated Gerber Generation
Automatic Gerber generation once the design is approved for release.
DFA and DFM Integration
DFA checks are automated and reports get generated automatically, ensuring manufacturing compatibility.
What Still Needs Work
Manual Intervention Required
Need for manual intervention due to incomplete traces and additional via removal. Manual refinement typically requires 6 hours compared to several hours for traditional autorouters.
Power Plane Optimization
Power planes need some more tweaking to achieve optimal performance.
How We Compare
Traditional Autorouters
- Extensive configuration setup required
- 80-90% typical completion rates
- Several hours of manual refinement
- Generic algorithms not optimized for embedded hardware
- Poor component placement integration
Our Automation Approach
- Minimal configuration - data from schematic
- 80% completion with embedded-optimized algorithms
- 6 hours manual refinement needed
- Specifically designed for IoT/embedded hardware
- Integrated placement and routing optimization
Want to See More Examples?
If you'd like to see our tool flow with more examples or have specific questions about our automation approach, we'd be happy to share more details.
Request Technical Demo View More Examples