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How We Automate KiCad PCB Routing. Is it any good?

November 07, 2025By Manav Marwah
How We Automate KiCad PCB Routing. Is it any good?

Why We Need Automation in KiCad?

Imagine finishing your schematic, importing it into your PCB editor, and instead of facing a three-day routing marathon, you define your core design rules, click a button, and watch as an intelligent agent places and routes your board in minutes. You're no longer a hard-working engineer doing repetitive tasks; you're a supervisor, free to focus on the high-level, critical aspects of your design. This isn't a fantasy from a million-dollar EDA suite. It's the future we believe is possible with AI PCB automation for KiCad, and it addresses the platform's most significant bottleneck: its entirely manual workflow.

In our previous posts, we discussed [how we automate altium ai pcb routing], [why pcb autorouting remains broken] and [why autoplacement requires manual intervention]. While those challenges exist in commercial EDA platforms, KiCad doesn't even have these automation features to begin with. The question we're addressing today: Can we bring effective AI PCB automation to KiCad's manual-only workflow?

How Do We Add Automation to KiCad?

For any effective AI PCB automation, you need good placement first, then PCB autorouting. Without intelligent component placement, even the best routing algorithms will struggle to produce quality results. To achieve a good understanding of the design, we use the automation pipeline mentioned below and KiCad's Python scripting interface. Our AI PCB automation process differs from traditional PCB autorouting in a fundamental way: we start by reading and understanding the schematic design intent before generating the physical layout.

Our Automation Pipeline

๐Ÿ“„ Schematic Analysis

We parse KiCad schematic files (.kicad_sch format) to extract connectivity information, component relationships, and circuit hierarchies. This gives us context that pure netlist-based approaches miss.

๐Ÿง  Design Intent Extraction

From the schematic data, we identify functional blocks, power distribution networks, high-speed interfaces, and critical signal paths. This understanding guides our placement and routing decisions.

๐Ÿ”ง KiCad Python Integration

Using KiCad's Python scripting capabilities, we programmatically generate the PCB layout, place components, and create routing paths. The integration allows us to work within KiCad's native environment.

Automation Architecture Diagram
Automation Architecture Diagram

Target Board: Main Avionics Board

To test our automation approach, we selected a real-world design: the Main Avionics Board from the Terrapin Rocket Team's Student Researched and Developed (SRAD) Avionics project. This board represents a genuine embedded hardware challenge with practical constraints.

Board Specifications

STM32H7
Main MCU (A3-ZI Variant)
Avionics
Application Domain
Multi-Layer
Board Complexity

This board includes power management, sensor interfaces, communication peripherals, and the complexity typical of aerospace applications. It's an ideal test case because it represents real engineering requirements rather than a simplified example.

Source: Terrapin Rocket Team GitHub Repository

STM32 Schematic Page 1
STM32 Schematic Page 1
STM32 Schematic Page 2
STM32 Schematic Page 2
STM32 Original Board File
STM32 Original Board File

What Are the Inputs for the App?

Our automation system requires specific inputs from the KiCad design environment:

๐Ÿ“‹ Required Input Files

  • KiCad schematic files (.kicad_sch) - Contains circuit connectivity and hierarchy
  • Board file with board outline and component footprints kept outside the board outline
  • Design rules - Track widths, clearances and layer stackup. These are added through external document
STM32 Input Board
STM32 Input Board

How Do We Control and Review the Design Generation Process?

Using our app we allow the code to be run through various stages so that the user has control over every stage and does not waste time while running a large design cycle. Following stage outputs are available which can be iterated again and again: Placement, Routing and Gerber generation. Engineers need visibility into what the automation is doing and the ability to guide the process.

Reviews Done During Every Process

๐Ÿ” 1. Check for Netlist Errors

Verification of netlist integrity and connectivity before processing begins.

๐Ÿ“š 2. Library Mismatch

Detection of component footprint and library inconsistencies.

๐Ÿ“Š 3. Placement Scores

Generated based on the dynamic rules created for the database.

๐Ÿญ 4. DFA/DFM Checks

Design for Assembly and Design for Manufacturing validation.

โœ… 5. Routing Scores

Evaluation of routing quality and completion metrics.

How Do the Placement Results Look?

Placement quality directly impacts routing success. Our approach focuses on understanding circuit functionality to create logical component groupings.

Placement Features

๐ŸŽฏ Circuit-Aware Grouping

Components are grouped based on their functional relationships identified from the schematic. Power management circuits stay together, sensor interfaces are clustered, and the MCU support circuitry is properly organized around the processor.

โšก Critical Component Positioning

Decoupling capacitors are automatically placed close to their associated power pins. Crystal oscillators and their load capacitors maintain proper geometric relationships.

Automated Placement Generation
Automated Placement Generation

How Does the Autorouting Look?

After placement, our PCB autorouting algorithms do the following: Power plane decision, power supply fanouts, stackup selection if not input, differential nets routing strategy, via optimization, routing of traces, cleanup.

Routing Completion

~5min
Automated Routing Time
Easy-Medium
Routing Complexity

The AI PCB automation completed routing across signal layers and power planes. However, like all PCB autorouting approaches, not everything was perfect on the first pass.

Automated Top Layer Routing
Automated Top Layer Routing
Automated Bottom Layer Routing
Automated Bottom Layer Routing
Altium Designer Autoplace Interface
Automated Power Plane Generation

What's Great About This Automation?

โœ… Genuine Advantages

Intelligent Agent

An agent that enhances your productivity while working from your desktop. The placement task that would have taken half a day to 1 day for a layout engineer was completed in 5 minutes depending on the system. The agent was able to place all the components within the board dimensions while taking multi-objective decisions of balancing mounting hole placements, edge components, routing, power planes, differential routing, placement of other blocks as per electrical constraints, power signals routing, and floorplanning. The power plane generation and complete board routing reduced the time to 5 minutes.

Schematic-Driven Intelligence

By starting with schematic analysis, the AI PCB automation understands circuit intent. This produces more logical placement and routing decisions compared to purely netlist-based approaches.

IP Protection

We generated this design using automation algorithms which run from your system, keeping your design data secure on your own hardware.

Minimal Configuration Setup

Unlike traditional PCB autorouting tools that require extensive constraint definition, our approach extracts most requirements directly from the schematic. Engineers spend less time configuring the tool and more time reviewing results.

Integrated Workflow

The AI PCB automation process handles both placement and routing in a coordinated manner, considering how placement choices affect routing outcomes. This integration improves overall results. The algorithm is known to work reliably on latest KiCad versions.

What Part of the Design Was Manually Created?

Transparency is important. Our automation doesn't eliminate the need for engineering judgmentโ€”it reduces repetitive work.

Manual Design Elements

๐ŸŽจ Board Outline Definition

The mechanical board shape, mounting holes, and connector locations were defined manually based on the enclosure requirements. Automation needs these boundaries to work within. Board footprints are expected by default.

๐Ÿ“ Predefined Constraint

You can suggest connector or component positions beforehand by defining the rough location where you want certain components. This allows the automation to work within your preferred layout structure while optimizing the surrounding placement.

โš™๏ธ Design Rules Setup

Design rules are set up using an external document which the app reads while running. This allows for easy configuration of track widths, clearances, and via sizes specific to your project requirements.

๐Ÿ”ง Final Placement Refinement

The automated placement was modified for crystal and decoupling capacitors, as well as power blocks to make them more routable. These adjustments ensured optimal signal paths and power distribution.

โœ๏ธ Final Routing Refinement

After automated routing, the design required manual review and cleanup. Differential traces, even though routed, needed refinement. Power planes on the top layer had to be redrawn. Some signals had to be rerouted for optimal signal integrity and electrical performance.

Time Investment Reality

The automated portion (placement + routing) took approximately 10 minutes. Manual refinement and optimization required an additional 3 hours of engineering time. This is still significantly faster than full manual design, which could take 16-24 hours for a board of this complexity.

What Still Needs Work?

We're committed to honest assessment of our technology. Here are the areas where improvement is needed:

โš ๏ธ Current Limitations

Via Optimization

The automated routing sometimes generates more vias than necessary. While functionally correct, reducing via count would improve signal integrity and reduce manufacturing costs. Manual via consolidation was required.

Trace Length Matching

For high-speed differential pairs and parallel buses that require length matching, the automation currently lacks sophisticated tuning capabilities. These traces required manual adjustment to meet timing requirements.

Board Complexity

If the size of the board reduces wherein the placement has to be done, it is possible that the current algorithm would struggle. We would be adding another board study which would show more components on a board having higher complexity count.

Scalability Testing Ongoing

This avionics board represents moderate complexity. We're continuing to test the automation with larger designs to understand scalability limits and identify optimization opportunities.

How Do We Compare?

An honest comparison of AI PCB automation approaches requires acknowledging that different PCB autorouting methods have different strengths:

KiCad Manual Routing

  • Complete engineer control over all decisions
  • Optimal results for experienced designers
  • Time-intensive: 16-24 hours for this board complexity
  • Requires deep understanding of design intent
  • No automated assistance for repetitive tasks

Our AI PCB Automation

  • Schematic-driven AI PCB automation provides design context
  • Integrated placement and PCB autorouting optimization
  • ~10min automation + 3 hours refinement
  • Works within KiCad's native environment
  • Still requires manual optimization for production

The Honest Assessment

Our AI PCB automation doesn't replace skilled PCB designers. Instead, it handles the repetitive aspects of layout work, allowing engineers and managers to increase productivity and reduce time to market for product.

Want to See More Examples?

Check other boards covered in Case Study section. We cover boards designed using same AI PCB automation and PCB autorouting algorithm in Altium, Cadence, KiCad and other tool series.

Request Technical Discussion View More Case Studies